x86: h264_intrapred: Don't add the 'd' suffix to the SPLATB_REG macro

Message ID 1341561762-56040-1-git-send-email-martin@martin.st
State Committed
Commit f27386cdc76d8524df71e684a3ec5481940004f1
Headers show

Commit Message

Martin Storsjö July 6, 2012, 8:02 a.m.
The SPLATB_REG macro already adds the 'd' suffix internally.

This fixes building on Win64, which has been broken since 878e66902.

This worked for unix, where r2 happened to be rdx in this case, which
with the first suffix rdxd was mapped to eax, and eaxd is defined back
to eax. On win64 however, r2 happened to be R8 in this case, and
R8d mapps to R8D just fine, but there's no mapping for R8Dd to anything.
---
 libavcodec/x86/h264_intrapred.asm |    2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

Comments

Martin Storsjö July 6, 2012, 2:19 p.m. | #1
On Fri, 6 Jul 2012, Martin Storsjö wrote:

> The SPLATB_REG macro already adds the 'd' suffix internally.
>
> This fixes building on Win64, which has been broken since 878e66902.
>
> This worked for unix, where r2 happened to be rdx in this case, which
> with the first suffix rdxd was mapped to eax, and eaxd is defined back
> to eax. On win64 however, r2 happened to be R8 in this case, and
> R8d mapps to R8D just fine, but there's no mapping for R8Dd to anything.
> ---
> libavcodec/x86/h264_intrapred.asm |    2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/libavcodec/x86/h264_intrapred.asm b/libavcodec/x86/h264_intrapred.asm
> index 5984454..50a615b 100644
> --- a/libavcodec/x86/h264_intrapred.asm
> +++ b/libavcodec/x86/h264_intrapred.asm
> @@ -156,7 +156,7 @@ cglobal pred16x16_dc, 2,7
> %if cpuflag(ssse3)
>     pxor       m1, m1
> %endif
> -    SPLATB_REG m0, r2d, m1
> +    SPLATB_REG m0, r2, m1
>
> %if mmsize==8
>     mov       r3d, 8
> -- 
> 1.7.9.4

OKd by Jason on irc.

// Martin

Patch

diff --git a/libavcodec/x86/h264_intrapred.asm b/libavcodec/x86/h264_intrapred.asm
index 5984454..50a615b 100644
--- a/libavcodec/x86/h264_intrapred.asm
+++ b/libavcodec/x86/h264_intrapred.asm
@@ -156,7 +156,7 @@  cglobal pred16x16_dc, 2,7
 %if cpuflag(ssse3)
     pxor       m1, m1
 %endif
-    SPLATB_REG m0, r2d, m1
+    SPLATB_REG m0, r2, m1
 
 %if mmsize==8
     mov       r3d, 8